ASIC Design Verification Engineer – Risc V and/or Systolic Array experience required Category: Engineering Employment Type: Contract Reference: BH-392411 ASIC Design Verification Engineer – Risc V and/or Systolic Array experience re...
Lugar:
San Jose, CA | 24/01/2026 18:01:52 PM | Salario: S/. No Especificado | Empresa:
YohDuration: 6 months Job Duties: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and Client internal IPs. Successful candidates will be responsible for leading, and participating in,...
development for the verification of RTL blocks Experience verifying ASICs / FPGAs Experience with building and setting up...
network switch ASICs, create diagnostic tests for various platforms, and work with design engineers to bring up platforms... sheets, user manuals, and hardware schematics. Collaborate with the ASIC team to bring up new custom network switch ASICs...
by performing high-reliability PCB rework on advanced hardware platforms, including boards with custom ASICs and very large BGAs..., including custom ASICs greater than 70 mm. Operate large-format BGA rework systems with precise alignment, controlled thermal...
Lugar:
Cupertino, CA | 13/02/2026 21:02:59 PM | Salario: S/. No Especificado | Empresa:
Yoh, distillation, benchmarking on NPUs/DSPs/ASICs Media & Signal Processing: GStreamer, FFmpeg, MediaPipe, OpenCV Communication...
Lugar:
Orem, UT | 25/01/2026 18:01:35 PM | Salario: S/. No Especificado | Empresa:
Kforce, radar, and text data Model Optimization: Post-training quantization, pruning, distillation, benchmarking on NPUs/DSPs/ASICs...
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