Mixed Signal Logic Design Engineer

, ADC/DAC designs, communications theory, and/or microarchitecture design concepts Experience producing high-level..., US, California, Santa Clara Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds...

Lugar: Hillsboro, OR | 02/06/2026 18:06:47 PM | Salario: S/. No Especificado | Empresa: Intel

Hardware & Silicon Validation Director

(CSE) group is part of Central Engineering (CE), the engine that powers every Business Unit at Marvell. CSE... through production release. Drive bring-up, debug, and characterization of analog front-end (AFE), ADC/DAC, PLL/DLL, CDR...

Lugar: Santa Clara, CA | 27/05/2026 18:05:37 PM | Salario: S/. No Especificado | Empresa: Marvell

Director Analog Mixed Signal Design - Optical

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell's Broadband Analog group...). This group is the market leader in delivering TIAs and Drivers for Data Center and Telecom markets. We address the bandwidth...

Lugar: Westlake Village, CA | 24/05/2026 02:05:17 AM | Salario: S/. No Especificado | Empresa: Marvell

Advanced Packaging Design Staff Engineer

for the next generation high performance computing (HPC), Artificial Intelligence (AI) and networking solutions. The group... generation HBM, DDR, SerDes, D2D, D2H, ADC, DAC, PCIE, Ethernet, etc Good understanding of signal and power integrity...

Lugar: Burlington, VT | 10/04/2026 17:04:27 PM | Salario: S/. $121000 - 179040 per year | Empresa: Marvell
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