Electrical Engineering - Cleared Contractor - L5

specifications from system requirements Develop detailed FPGA architecture for implementation Implement design in RTL (VHDL...) and perform module level simulations Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA) Perform RTL...

Lugar: Herndon, VA | 16/12/2025 03:12:38 AM | Salario: S/. No Especificado | Empresa: LanceSoft

Front-End Infrastructure Engineer

-quality support for verification processes. RTL Architecture Tool Deployment & Support: You will successfully deploy... and maintain tools for RTL Architecture, ensuring integration with FE verification flows and addressing any support requirements...

Lugar: Austin, TX | 12/12/2025 18:12:15 PM | Salario: S/. No Especificado | Empresa: Protingent

Hardware Developer Engineer Intern

process, such as: Logic (RTL) design and verification, physical design, and analog/IO design Electronic design...

Lugar: USA | 12/12/2025 18:12:16 PM | Salario: S/. No Especificado | Empresa: IBM

Design Engineer IV

: Skills-"PCB LAYOUT", "RTL", “FPGA” 8 years of end-to-end FPGA design experience (RTL, Simulation, Implementation, Hands...

Lugar: Sunnyvale, CA | 27/11/2025 18:11:25 PM | Salario: S/. No Especificado | Empresa: Pyramid Consulting

Seasonal ASIC Design Associate_2

with RTL development, circuit layout, verification, and simulation. Collaborating on ASIC tapeouts, post-silicon validation.... Familiarity with CMOS analog or digital design, RTL design (Verilog/SystemVerilog), or SoC integration. Strong analytical...

Lugar: Batavia, IL | 11/11/2025 21:11:23 PM | Salario: S/. No Especificado

Technical Project Manager

;Program Management Register-Transfer Level (RTL) design ASIC Silicon Validation Bachelors degree or 4 years of relevant... ASIC design, RTL, physical design, analog and digital design fundamentals. Candidates should be able to clearly describe...

Lugar: Sunnyvale, CA | 31/10/2025 18:10:07 PM | Salario: S/. $70 - 80 per hour | Empresa: Pyramid Consulting

Seasonal ASIC Design Associate_5

with RTL development, circuit layout, verification, and simulation. Collaborating on ASIC tapeouts, post-silicon validation.... Familiarity with CMOS analog or digital design, RTL design (Verilog/SystemVerilog), or SoC integration. Strong analytical...

Lugar: Batavia, IL | 28/10/2025 18:10:25 PM | Salario: S/. No Especificado