RTL Design Tech Lead (ASIC/SoC)

Tech Lead to drive microarchitecture, RTL development, and technical execution across complex ASIC/SoC programs.... Candidates should have 10+ years of ASIC/SoC RTL design experience, strong expertise in SystemVerilog/Verilog, microarchitecture...

Lugar: Santa Clara County, CA | 14/05/2026 21:05:14 PM | Salario: S/. $220000 - 250000 per year | Empresa: MRL Consulting Group

Design Verification (DV) Engineer

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technology..., and Cocotb. FPGA and ASIC verification is part of an innovative, growing team at HRT which is integral to the success...

Lugar: Estados Unidos | 30/04/2026 17:04:05 PM | Salario: S/. $175000 - 250000 per year | Empresa: Hudson River Trading

Package Design Engineer

with downstream system design teams and upstream ASIC designers to develop a portfolio of packages that meets a huge range...

Lugar: Santa Clara, CA | 11/04/2026 17:04:22 PM | Salario: S/. $166520 - 249500 per year | Empresa: Marvell

Senior Staff Physical Design Manager

and designating project resources, monitor progress, and keep stakeholders informed the entire way Partner with other ASIC design... teams to ensure project success Possibility of being management interface to ASIC customers Lead recruiting efforts...

Lugar: Santa Clara, CA | 06/06/2026 02:06:40 AM | Salario: S/. $165450 - 247900 per year | Empresa: Marvell

Principal Engineer, ASIC/VLSI Synthesis and Design

custom silicon/ASIC design, system integrators, HBM memory, assembly, and packaging suppliers. What You Can Expect... We are seeking a highly skilled and experienced synthesis and ASIC front-end implementation Engineer to join our team. The ideal...

Lugar: San Diego, CA | 28/05/2026 20:05:56 PM | Salario: S/. $160400 - 237320 per year | Empresa: Marvell

Principal Digital Design Engineer

in micro-architecture of complex custom/ASIC products involving Chip I/O, shared memory, and embedded processors RTL design..., tools, and process efficiency to ASIC design flow Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX...

Lugar: San Diego, CA | 30/04/2026 18:04:56 PM | Salario: S/. $160400 - 237320 per year | Empresa: Marvell

Sr Principal Program Manager

What Makes This Role Unique Ownership extends beyond a single ASIC tapeout to complex, multi-disciplined system delivery...

Lugar: Santa Clara, CA | 18/06/2026 22:06:24 PM | Salario: S/. $158330 - 237200 per year | Empresa: Marvell

Sr Principal Program Manager

component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell DSP...

Lugar: Santa Clara, CA | 31/05/2026 02:05:46 AM | Salario: S/. $158330 - 237200 per year | Empresa: Marvell