The application window is expected to close on: 05/15/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position requires that you live within commuting distan...
About the job Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey...
Job Title: ASIC Design EngineerJob Description We are seeking a highly skilled ASIC Design Engineer to join our team. The ideal candidate will have substantial experience in SoC/CPU/GPU architecture and a strong proficiency in Verilog/Sys...
Req ID: JR94945 Principal Compute Pathfinding ASIC Design Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate...
Senior/Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Optim...
Senior or Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Op...
Description Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterd...
Senior or Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Op...
Senior or Staff ASIC Design Engineer Key Responsibilities: Design and implement digital circuits using HDL (Verilog/ System Verilog) Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis Op...
Immediate need for a talented Design Engineer V - Power ASIC Engineer. This is a 06 Months Contract opportunity with long-term potential and is located in Sunnyvale, CA (Hybrid). Please review the job description below and contact me ASAP i...