Senior Analog Layout Manager

technology and FinFET is preferable. High proficiency in LVS, DRC debugging, and interpreting CALIBRE DRC, ERC, LVS reports...

Lugar: San Diego, CA | 30/04/2026 21:04:29 PM | Salario: S/. $138200 - 204460 per year | Empresa: Marvell

SMTS Physical Design Engineer

. Physical Verification Sign-off: Execute and close DRC, LVS, and ERC to foundry-clean status using Mentor Calibre;manage waiver.../AOCV analysis, and ECO-driven timing closure Hands-on proficiency with Mentor Calibre for DRC, LVS, and ERC sign-off...

Lugar: Minneapolis, MN | 30/04/2026 21:04:39 PM | Salario: S/. No Especificado | Empresa: Micron

Staff Physical Design Engineer

(Quantus, StarRC), formal or physical verification (Formality, Verplex, Calibre, Hercules) a plus Familiarity with AI/ML...

Lugar: Irvine, CA | 30/04/2026 20:04:51 PM | Salario: S/. $112300 - 166280 per year | Empresa: Marvell