Hardware Design Engineer

constraint, CDC/RDC experience Verification experience Memory (HBM, GDDR, LPDDR, DDR) expertise AMBA AXI or CHI design...

Lugar: Hillsboro, OR | 12/02/2026 02:02:08 AM | Salario: S/. $106900 - 198500 per year | Empresa: Rambus

Sr. Lead, SW Full Stack Eng

scheduling;and 5 years of experience working with Kafka, MQ or similar event-driven tools and CDC technologies for real-time...

Lugar: Chicago, IL | 15/03/2026 23:03:04 PM | Salario: S/. $153317 - 194700 per year | Empresa: Northern Trust

Design Verification Engineer

and clock-domain crossing (CDC) in high-speed designs is highly desirable. Prior work with High Bandwidth Memory (HBM) or LPDDR...

Lugar: San Jose, CA | 29/01/2026 21:01:44 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom