DMTS Digital Design Engineer / Chip Lead

/ Genus) and guide optimization for PPA targets across all design blocks. IP Management: Define interfaces between PHY... with logic synthesis tools (Synopsys Design Compiler or Cadence Genus) and static timing analysis (PrimeTime or Tempus...

Lugar: Minneapolis, MN | 29/04/2026 17:04:35 PM | Salario: S/. No Especificado | Empresa: Micron

RTL Design Engineer

and/or VHDL o Synthesis tools (Design Compiler, Genus) o Scripting languages (Python, Perl, TCL) Preferred Qualifications...

Lugar: Austin, TX | 26/04/2026 22:04:19 PM | Salario: S/. No Especificado | Empresa: Intel

Paleontologist (on-call)

of vertebrate and/or invertebrate fossils to genus- or species-level for various projects. Should possess expertise in field...

Lugar: Phoenix, AZ | 24/04/2026 02:04:41 AM | Salario: S/. $31 per hour | Empresa: AECOM

Paleontologist (on-call)

of vertebrate and/or invertebrate fossils to genus- or species-level for various projects. Should possess expertise in field...

Lugar: Murray, UT | 24/04/2026 01:04:03 AM | Salario: S/. $31 per hour | Empresa: AECOM

Paleontologist (on-call)

of vertebrate and/or invertebrate fossils to genus- or species-level for various projects. Should possess expertise in field...

Lugar: Denver, CO | 23/04/2026 19:04:58 PM | Salario: S/. $31 per hour | Empresa: AECOM

Paleontologist (on-call)

of vertebrate and/or invertebrate fossils to genus- or species-level for various projects. Should possess expertise in field...

Lugar: Las Vegas, NV | 23/04/2026 19:04:39 PM | Salario: S/. $31 per hour | Empresa: AECOM

Paleontologist (on-call)

of vertebrate and/or invertebrate fossils to genus- or species-level for various projects. Should possess expertise in field...

Lugar: Albuquerque, NM | 23/04/2026 17:04:26 PM | Salario: S/. $31 per hour | Empresa: AECOM

Digital Design Engineer

. Knowledge in EDA tools such as Cadence Digital EDA suite (Genus, Tempus, Jasper, Voltus, Modus, Conformal etc.) is an advantage...

Lugar: San Diego, CA | 17/04/2026 17:04:25 PM | Salario: S/. No Especificado | Empresa: Syntiant

Physical Design Engineer

process nodes (5nm and below) Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL...

Lugar: Austin, TX | 16/04/2026 18:04:09 PM | Salario: S/. $15000 - 27000 per year | Empresa: Etched

CPU Synthesis CAD Engineer

nodes (5nm or lower) Strong user of synthesis tools such as Cadence Genus or Synopsys Fusion Compiler Proven track record...

Lugar: Santa Clara, CA | 11/04/2026 23:04:22 PM | Salario: S/. No Especificado | Empresa: Qualcomm