such as schematic symbols, layout p-cells, CDFs, DRC/LVS decks, technology files used in parasitic extraction, ESD verification..., and callbacks. Develop device layout generators (PCELLs). Develop as well as improve physical verification (DRC/LVS) rule decks...
integrity signoff, and physical verification (DRC/LVS) Provide strategic leadership and technical direction to physical design... professional experience or Master’s degree in Computer Science, Electrical Engineering or related fields with 10-12 years...
Lugar:
Austin, TX | 04/06/2026 19:06:59 PM | Salario: S/. No Especificado | Empresa:
MarvellBroadcom's Central Engineering Design Correlation team is looking for an energetic and self-driven professional... quality assurance of designs and tape-outs, b) EDA & RCX tool quality and predictability, and c) custom device infrastructure...
Lugar:
Irvine, CA | 12/05/2026 20:05:02 PM | Salario: S/. $108000 - 172800 per year | Empresa:
Broadcom marketing in product definition Having a wide-ranging experience uses professional concepts and company objectives to resolve... blocks (e.g., OPAMP, gm-C filters, switch capacitors, ADC, DAC, state-machines, and bus interfaces) Advanced understanding...
Lugar:
Nashua, NH | 08/05/2026 17:05:16 PM | Salario: S/. $114400 - 220200 per year | Empresa:
Skyworks-ranging experience uses professional concepts and company objectives to resolve complex issues in creative and effective way... knowledge (capacitance, resistance, power grid) Advanced knowledge of circuit building blocks (e.g., OPAMP, gm-C filters...
Lugar:
Nashua, NH | 08/05/2026 17:05:15 PM | Salario: S/. $114400 - 220200 per year | Empresa:
Skyworks for DRC and LVS debugging to streamline physical verification flow. Automate and support physical verification flow... or related fields and 5-10 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical...
, and physical verification (DRC/LVS) Ensure successful and timely tapeouts of complex, high-performance SoCs Participate... Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional...
Lugar:
Irvine, CA | 30/04/2026 17:04:07 PM | Salario: S/. $112300 - 166280 per year | Empresa:
Marvell (Verilog, RTL synthesis, logic simulation, place and route), scripting languages (Perl, Python, or C++), and Verilog‑A basics... simulators such as HSPICE, Verilog, XA, or Finesim. Experience with Cadence design environments and LVS/DRC tools...
Lugar:
San Jose, CA | 27/03/2026 00:03:26 AM | Salario: S/. $83000 - 170000 per year | Empresa:
Micron1