Senior FPGA/DSP Engineer

fixed-point DSP blocks in RTL, such as IIR and FIR filters, PWM generators, delta-sigma modulators, PLLs, DFT/FFT processors...

Lugar: Santa Cruz, CA | 01/04/2026 01:04:48 AM | Salario: S/. $132800 - 199300 per year | Empresa: Joby Aviation

SOC Design Verification Engineer

architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural...

Lugar: Estados Unidos | 01/04/2026 01:04:37 AM | Salario: S/. $105650 - 149150 per year | Empresa: Intel

FPGA Design Scientist

. Define and execute RTL design and implementation, verification, block-level simulations, hardware integration / test...

Lugar: San Diego, CA | 01/04/2026 01:04:05 AM | Salario: S/. No Especificado | Empresa: ASML