GPU Power Systems Engineer

such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams...

Lugar: San Diego, CA | 03/03/2026 03:03:38 AM | Salario: S/. $161800 - 242600 per year | Empresa: Qualcomm

Senior Manager, ASIC Design

development, RTL coding (Verilog/SystemVerilog), synthesis, STA/timing closure, physical design, and verification methodologies...

Lugar: Santa Clara, CA | 17/02/2026 21:02:16 PM | Salario: S/. $161600 - 239210 per year | Empresa: Marvell

Sr. Design Engineer

Design and RTL design;2\. Analog circuits, mixed-mode design and validation;3\. Design/Verification CAD tools...

Lugar: San Jose, CA | 17/03/2026 21:03:26 PM | Salario: S/. $168179 - 238000 per year | Empresa: Micron

Senior Emulation Engineer

across multiple teams. - Collaborate closely with RTL design, verification, and firmware teams to define requirements, develop... issues across RTL, firmware, emulation platforms, and toolchain interactions. - Optimize emulation performance, including...

Lugar: Santa Clara, CA | 16/04/2026 19:04:07 PM | Salario: S/. $158600 - 237600 per year | Empresa: Marvell

CPU Micro-Architect RTL Engineer

microarchitecture and RTL design, with knowledge in one or more of the following areas: Processor pipelines Out-of-order execution...-V architecture You will own microarchitecture and RTL development, including low-power optimizations, performance exploration...

Lugar: Austin, TX | 03/03/2026 03:03:45 AM | Salario: S/. $154000 - 231000 per year | Empresa: Qualcomm

Staff SOC Design Engineer

verification/validation. Assists in debugging RTL simulations. Participates in design and verification/validation reviews. Acts...

Lugar: Santa Clara, CA | 14/04/2026 18:04:00 PM | Salario: S/. $156853 - 229800 per year | Empresa: Qualcomm

ASIC Design Engineer

blocks. Own RTL development for assigned blocks, delivering high‑quality, synthesizable SystemVerilog RTL that meets... design, including micro‑architecture development, RTL implementation (SystemVerilog preferred), and integration of complex...

Lugar: Irvine, CA | 20/03/2026 03:03:19 AM | Salario: S/. $151000 - 223440 per year | Empresa: Marvell