Lead ASIC DFT Engineer

, and DFT-specific timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation.... Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality. Act as a technical...

Lugar: Plano, TX | 27/06/2026 17:06:13 PM | Salario: S/. No Especificado | Empresa: Purple Hires Inc

Senior Engineer, GPU Graphic Core Performance Verification

. You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify bottlenecks, debug performance issues..., correlating, and comparing performance behavior across architectural models, RTL, emulation, and silicon, identifying bottlenecks...

Lugar: San Jose, CA | 27/06/2026 17:06:54 PM | Salario: S/. No Especificado | Empresa: Samsung

Staff Engineer, GPU Graphic Core Performance Verification

. You will partner closely with GPU architecture, modeling, RTL, and validation teams to identify bottlenecks, debug performance issues..., correlating, and comparing performance behavior across architectural models, RTL, emulation, and silicon, identifying bottlenecks...

Lugar: San Jose, CA | 27/06/2026 17:06:19 PM | Salario: S/. No Especificado | Empresa: Samsung

ASIC DFT Engineer

, and DFT-specific timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation.... Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality. Act as a technical...

Lugar: Plano, TX | 27/06/2026 17:06:17 PM | Salario: S/. No Especificado | Empresa: Purple Hires Inc

Senior ASIC Design Engineer - Agentic AI

that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications... RTL, and deliver a fully verified, synthesis/timing clean design. Collaborate and coordinate with other designers...

Lugar: Santa Clara, CA | 27/06/2026 17:06:47 PM | Salario: S/. No Especificado | Empresa: Nvidia

ASIC DFx & Test Architect Lead

that support ATE screening, in-system test, debug and diagnostics needs of the design. Lead the RTL implementation from the... architecture specifications and required RTL quality checks implementations. Work with the team on Innovative Hardware DFx & test...

Lugar: San Jose, CA | 27/06/2026 17:06:41 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

ASIC Engineering Technical Leader - CDC

& implement robust and reusable RTL with CDC/RDC considerations Spec comprehensive CDC/RDC check flows and work with CAD team... of related experience, or PhD + 3 years of related experience Prior experience with RTL development skills and experiences...

Lugar: San Jose, CA | 27/06/2026 17:06:11 PM | Salario: S/. No Especificado | Empresa: Cisco Systems