Delivery Project Lead

standards (like WCAG) and supports various screen sizes, orientations, and right-to-left (RTL) languages Documentation: Create...

Lugar: Nueva York, NY | 07/06/2026 17:06:30 PM | Salario: S/. No Especificado | Empresa: TalentOla

SOC Threat Intelligence Analyst

In-Person Interview Required! SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role...: Design and develop advanced SoCs across architecture, RTL, and verification. Responsibilities: RTL design, verification...

Lugar: Estados Unidos | 07/06/2026 17:06:03 PM | Salario: S/. $60 - 62.5 per hour | Empresa: Openkyber

Software Engineer (C)

of debug tools and techniques (e.g. RTL Waveforms, Lauterbach, Transaction-level models) and lab equipment like Logic Analyzers...

Lugar: Estados Unidos | 07/06/2026 17:06:21 PM | Salario: S/. No Especificado | Empresa: Openkyber

DFT / ATPG Engineer

verification concepts. Solid understanding of digital design and RTL fundamentals. Experience with industry-standard DFT/ATPG..., MBIST, SoC, ASIC, RTL, Clock DFT, IO Testing, Test Pattern Generation, Fault Coverage, EDA Tools, Semiconductor Testing...

Lugar: Estados Unidos | 07/06/2026 17:06:53 PM | Salario: S/. No Especificado | Empresa: ITMC Systems, Inc

SOC Architect

: RTL Design Engineer (Wireless SoC) Location: Remote PST hours Duration: Long Term Contract Hiring Manager Note...: We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate...

Lugar: Estados Unidos | 07/06/2026 17:06:58 PM | Salario: S/. No Especificado | Empresa: Openkyber

Senior FPGA Engineer

, and validate FPGA architectures for high-reliability embedded systems Develop RTL code using VHDL and/or Verilog/SystemVerilog...

Lugar: El Segundo, CA | 07/06/2026 17:06:38 PM | Salario: S/. No Especificado | Empresa: ITResource Hunter

Senior Electrical Engineer- FPGA Development

lifecycle, from concept to production. It takes experts in system architecture definition, RTL design, synthesis, timing.../System Verilog and hardware description language (HDL) coding practices Proficiency in design, register-transfer level (RTL...

Lugar: Round Rock, TX | 07/06/2026 17:06:27 PM | Salario: S/. No Especificado | Empresa: Dell, Inc.

Lead ASIC DFT Engineer

, and DFT-specific timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation.... Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality. Act as a technical...

Lugar: Plano, TX | 07/06/2026 17:06:58 PM | Salario: S/. No Especificado | Empresa: Purple Hires Inc