. Strong proficiency with FPGA or ASIC RTL design entry. Experience with complex timing closure and industry best practices for digital...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
and peer code review, writes automated tests (pytest, Jest/RTL), resolves defects/tech debt, and maintains technical...
logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers...) across multi-mode/multi-corner (MMMC) scenarios;partner with RTL, architecture, and STA/signoff to converge designs. Integrate...
. Strong proficiency with FPGA or ASIC RTL design entry. Experience with complex timing closure and industry best practices for digital...
/SystemVerilog is essential for RTL (Register Transfer Level) design. FPGA Tools: Experience with industry-standard FPGA design...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
. Essential Skills 5 years+ experience in FPGA/ASIC design and RTL implementation. Solid understanding of DSP algorithms (FFT...