Engineer, you will be part of a verification team responsible for the full cycle of RTL verification for FPGA and ASIC designs... with RTL, System and software engineers to determine appropriate coverage closure for chip designs. Create drivers, monitors...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
and system level Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement Support...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
(requirements, design, implementation, and test). Must be knowledgeable in VHDL and/or Verilog RTL coding and be proficient in micro...
understanding of digital logic design, including FSMs, pipelining, and resource optimization. 2-5 years of experience with RTL...
(schematic-based) or RTL design verification flows Demonstrated ability to independently define and drive verification...
, firmware, RTL, or system-level root causes. Drive issue resolution through detailed debug, data collection, and technical...
from the crowd: Exposure to standard cell, memory, or custom circuit development would be beneficial. Experience with RTL...
, and high-quality coverage closure. You will work closely with architects, RTL designers, and fellow verification engineers... efficiency, quality, and methodology. KEY RESPONSIBILITIES Collaborate with CPU architects and RTL designers to understand...