with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
. Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The candidate will be responsible..., and refinement of RTL design to target power, performance, area, and timing goals Perform Functional verification support and assist...
and implement design flows for RTL-to-GDSII, verification, physical design, timing closure, and sign-off. Infrastructure Management... methodology leadership. Technical Expertise: Deep knowledge of RTL design, verification, synthesis, place & route, timing...
timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve..., and diagnosis/debug. Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration. Review RTL, synthesis, LEC...
transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks... of the block being designed. • Applying various strategies, tools, and methods to write RTL and optimize logic to qualify the...
Expert with strengths in RTL and Timing to support FPGA-SoCs and custom ASICs. In this role, you will own and drive DFx... Architecture definition, RTL implementation and methodology development. THE PERSON: You have had significant success driving...
tools Python for configuration and automation of setup tasks. Familiarity with FPGA PCBA platforms - RTL, design synthesis...
SoCs. Collaborate with architects, RTL designers, FPGA, and emulation engineers to ensure verification requirements...
development across the full-lifecycle from RTL design, verification, synthesis, timing analysis, and bring up/validation...
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...