ASIC SoC Verification Engineer

debugging RTL in block and chip-level environments Strong verbal and written technical communication skills Highly Desired...

Lugar: Austin, TX | 27/03/2026 18:03:37 PM | Salario: S/. $117000 - 175000 per year | Empresa: Ericsson

ASIC Design Engineer

into RTL, turning specifications into efficient silicon, and partnering across disciplines to solve hard problems..., reliable, and ready for what’s next. The opportunity You’ll own RTL blocks and integration work that feed into flagship...

Lugar: Austin, TX | 27/03/2026 18:03:27 PM | Salario: S/. $117000 - 175000 per year | Empresa: Ericsson

Developer Virtual Platforms

skills Strongly preferred Experience Experience with embedded software design and test Exposure to debugging RTL...

Lugar: Austin, TX | 27/03/2026 18:03:19 PM | Salario: S/. $117000 - 175000 per year | Empresa: Ericsson

Senior Serdes System Design Engineer/Architect

with RTL simulations Develop, test, and debug firmware associated with physical layer functionality Lab testing and debug... in equalization techniques for wireline communication applications such as read-channel is also a very big plus. RTL coding...

Lugar: San Jose, CA | 27/03/2026 02:03:22 AM | Salario: S/. $108000 - 192000 per year | Empresa: Broadcom

Principal STA Engineer

-functional teams-RTL designers, physical design specialists, and SI/PI engineers-to drive timing convergence and ensure robust... is composed of experts in physical design, RTL architecture, SI/PI analysis, and verification, working collaboratively to achieve...

Lugar: Austin, TX | 27/03/2026 02:03:50 AM | Salario: S/. No Especificado | Empresa: Synopsys

Cell Modeling and Verification Engineer - New College Grad 2026

. Document, implement, and deliver fully verified and high performance RTL to achieve design targets. What we need... to see: Bachelors or Masters in Electrical Engineering or Computer Engineering (or equivalent experience). Hands-on experience with RTL...

Lugar: Santa Clara, CA | 27/03/2026 02:03:32 AM | Salario: S/. $100000 - 166750 per year | Empresa: Nvidia

Staff Engineer, Circuit Design

(Verilog coding, RTL synthesis, logic simulation, place and route) Proficient knowledge in memory cell test flow. Layout...

Lugar: San Jose, CA | 27/03/2026 02:03:41 AM | Salario: S/. $116000 - 246000 per year | Empresa: Micron