CPU Microcode Design Engineer

development in CPU microcode. Computer Architecture and/or Micro Architecture techniques. RTL logic design using Verilog...

Lugar: Austin, TX | 26/03/2026 01:03:27 AM | Salario: S/. No Especificado | Empresa: Intel

Principal Design Engineer

, IO buffers, RTL, Verilog) Proficient fundamentals in semiconductor and device physics and analog/mixed-signal circuit design...

Lugar: San Jose, CA | 26/03/2026 01:03:42 AM | Salario: S/. No Especificado | Empresa: Micron

Design Engineer

physical design tools Experience on Calibre LVS/DRC Work closely with RTL & DFT designers Strong TCL/Python scripting...

Lugar: San Jose, CA | 26/03/2026 01:03:00 AM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom