Senior ASIC DV Engineer
metrics from specifications and writing block and chip-level tests. Debugging RTL and Gate simulations and work with design...
Lugar: San Jose, CA | 27/05/2026 18:05:07 PM | Salario: S/. No Especificado | Empresa: Broadcom
Sr Principal Design Engineer
CPU microarchitect who brings hands-on RTL development experience and a track record of technical leadership. We’re... RTL design of the major functional block. Ownership includes the design definition, implementation and convergence of the...
Lugar: Austin, TX | 27/05/2026 18:05:51 PM | Salario: S/. No Especificado | Empresa: GlobalFoundries
Senior Program Manager
cross-domain support for issue resolution to keep project on schedule, at spec and quality (RTL, DV, DFT, PD, emulation, FW...
Formal Verification Engineer
, and collaborate with RTL designers, simulation-based verification engineers, and architects to shift verification left and improve..., complexity reduction strategies, and assume-guarantee reasoning Collaborate with RTL designers and architects to define...
Lugar: Austin, TX | 27/05/2026 18:05:51 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices
Target Optical - Store Manager 1 #4802 Duluth MN
with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
Lugar: Duluth, MN | 27/05/2026 17:05:50 PM | Salario: S/. No Especificado | Empresa: EssilorLuxottica
Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design...
Lugar: Estados Unidos | 27/05/2026 17:05:16 PM | Salario: S/. No Especificado | Empresa: SpaceX
Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design...
Lugar: Estados Unidos | 27/05/2026 17:05:28 PM | Salario: S/. No Especificado | Empresa: SpaceX
Principal Hardware Design Engineer - Systems Engineering
RTL team to understand and implement various features/interfaces;collaborate with SI engineers and chip package vendors...
Lugar: Santa Clara, CA | 27/05/2026 17:05:40 PM | Salario: S/. No Especificado | Empresa: Fox Point Recruitment
Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design...
Lugar: Estados Unidos | 27/05/2026 17:05:33 PM | Salario: S/. No Especificado | Empresa: SpaceX
SR ASIC Design Engineer - Networking/ DPU/ AI Systems
has hands-on experience across the full ASIC development cycle — from RTL architecture and design through tapeout, silicon bring... — from RTL architecture and design through tapeout, silicon bring-up, and mass production. KEY RESPONSIBILITIES: Architect...
Lugar: Santa Clara, CA | 27/05/2026 17:05:48 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices