Senior Staff Design Engineer - PCIE/CXL Subsystem COE

customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.... What You Can Expect Own and drive PCIE/CXL subsystem micro-architecture definition, RTL implementation, and integration...

Lugar: Santa Clara, CA | 23/05/2026 00:05:23 AM | Salario: S/. $134390 - 201300 per year | Empresa: Marvell

Principal SoC Design Engineer, HBM

that meet aggressive power, performance, area, and schedule targets. This is a hands‑on technical role focused on RTL design... and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g...

Lugar: Richardson, TX | 22/05/2026 23:05:54 PM | Salario: S/. No Especificado | Empresa: Micron

Senior Staff Design Engineer - PCIE/CXL Subsystem COE

customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.... What You Can Expect Own and drive PCIE/CXL subsystem micro-architecture definition, RTL implementation, and integration...

Lugar: Irvine, CA | 22/05/2026 22:05:36 PM | Salario: S/. $135900 - 201130 per year | Empresa: Marvell

Lead ASIC Modem Design Engineer, Amazon Leo

specification to RTL to optimizing timing / power to chip level validation. · Develop solutions optimizing customer experience... and systems in RTL. - Ability to convert DSP algorithms into RTL code and optimize for performance, power, and area. Preferred...

Lugar: San Diego, CA | 22/05/2026 21:05:06 PM | Salario: S/. No Especificado | Empresa: Amazon

ASIC Design Engineer I, Satellite Communications

from system specification to chip specification to RTL to optimizing timing / power to chip level validation. · Drive high... and implementing Digital Signal Processing (DSP) algorithms and systems in RTL. - Ability to convert DSP algorithms into RTL code...

Lugar: San Diego, CA | 22/05/2026 20:05:25 PM | Salario: S/. No Especificado | Empresa: Amazon

DFT Engineer

methodologies and flows to deliver efficient, repeatable results across multiple projects. Integrate DFT requirements into RTL...

Lugar: Texas | 22/05/2026 20:05:44 PM | Salario: S/. No Especificado | Empresa: GlobalFoundries

SOC Formal Verification Engineer, HBM

level (RTL) designs. Collaborate with RTL designers, architects, and simulation-based verification engineers to resolve..., including finite state machines, pipelines, handshakes, clocking, and resets. Familiarity with register-transfer level (RTL...

Lugar: Richardson, TX | 22/05/2026 20:05:58 PM | Salario: S/. No Especificado | Empresa: Micron