SoC architect

micro-architecture specifications and RTL code using SystemVerilog. Cross-functional Collaboration: Partner with software...: Strong understanding of ARM based SoC architecture Design: Proven experience in Verilog/SystemVerilog RTL design. AMBA Protocols: Deep...

Lugar: Austin, TX | 21/03/2026 03:03:34 AM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Staff/Sr. Staff Design Verification Engineer - QGOV

General Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop... days a week Required Qualifications: 5+ years of work experience with RTL/FPGA design (Verilog), embedded system...

Lugar: San Diego, CA | 21/03/2026 03:03:27 AM | Salario: S/. No Especificado | Empresa: Qualcomm

New College Grad - Design Engineer, AI

correctness, performance, and efficiency Develop AI‑assisted approaches for design rule interpretation, RTL and architecture... exploration, verification coverage analysis, bug pattern detection, and regression triage Support RTL, gate‑level verification...

Lugar: San Jose, CA | 20/03/2026 23:03:32 PM | Salario: S/. $80000 - 170000 per year | Empresa: Micron