RTL for multiple logic blocks of Hexagon DSP core and sub-system for SoC integration Run various frontend tools to check...-15 years of practical experience with details of RTL development including: functional and structural RTL design, design...
of the new generation design Develop RTL for the corresponding micro architecture Provide essential verification... is desired. Experience in designing RTL for GPU, CPU, DSP, Machine-Learning, cache, controller, video, display, camera blocks...
and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL design to target power... functional verification strategy. Performance verification support. Help verify that the RTL design meets the performance goals...
, through micro architectural research and arriving at a detailed specification. ● RTL ownership. Development, assessment... and refinement of RTL design to target power, performance, area and timing goals. Bachelor's degree in Electrical Engineering...
of ASIC design experience RTL Expertise: System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC) Testing: Building the...
: RTL spyglass/lint RTL power design/optimization (PowerArtist) IP Logic design Good at C/C++ Familiarity...
or distributed teams, and are comfortable learning new skills as technologies evolve. KEY RESPONSIBLITIES: Design RTL for high... and low-power RTL techniques. Integrate IP blocks at the subsystem level and resolve inter-IP design and integration issues...
products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture... designer with proven expertise across the entire chip development lifecycle—from RTL design through silicon bring-up. You excel...
/SystemVerilog RTL. Analysis, debug, and resolution of Lint and CDC issues in the design. Design convergence to timing closure... utilizing RTL optimization strategies. Conduct formal verification of design with Synopsys Formality / Cadence Conformal...
, you will drive architecture through physical implementation, ensuring highly efficient design convergence across RTL, verification... manufacturing partners. Your role Lead full-chip design execution for complex, multi-million-gate SoCs from RTL through GDSII...