ASIC & FPGA Design Engineer Sr
for programmable logic components;writing clean, well documented RTL in VHDL/Verilog/SystemVerilog. Developing synthesis, place...
for programmable logic components;writing clean, well documented RTL in VHDL/Verilog/SystemVerilog. Developing synthesis, place...
physics. ### Preferred Qualifications: Experience with digital design using Register Transfer Level (RTL) methodologies...
‑performance RTL Design and Design Verification organization focused on Qualcomm family of GPU development. This role requires deep... in architecture, RTL micro‑architecture, verification strategy, and critical technical decisions. The ideal candidate...
, with a strong command of RTL design principles. Extensive experience in FPGA and front-end IC design, including architecture...
, software development, and system validation needs across multiple teams. - Collaborate closely with RTL design, verification... environment. - Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions...
-based) or RTL design verification flows Ability to independently evaluate technical issues and define solutions, with good...
architecture definition, RTL design, synthesis, timing analysis, prototyping, sourcing, and the debugging and validation of FPGA..., register-transfer level (RTL) design and simulation test benches Strong fundamentals in both analog and digital design...
performing module level design performing with Verilog RTL and function verification. Alternatively, employer will accept... performing module level design performing with Verilog RTL and function verification. Must also possess the following...
across multiple teams. - Collaborate closely with Senior Emulation Engineers, RTL design, verification, and firmware teams... and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions. - Optimize emulation performance...
testbenches using SystemVerilog, UVM, and C++, developing test code in parallel with RTL and applying constrained-random testing...