Senior FPGA Engineer
to apply emerging technologies in innovative ways to rapidly produce new products. Duties Design and verification of RTL modules...
to apply emerging technologies in innovative ways to rapidly produce new products. Duties Design and verification of RTL modules...
characterization data back to RTL and physical design teams as input for DVFS policy, clock gating coverage, and leakage optimization...
, and verification teams to study performance behavior long before RTL is finalized. This is a highly visible, greenfield-oriented role... architectural enhancements. Propose, execute, and oversee architectural case studies using existing silicon, RTL, and performance...
businesses include the entertainment company RTL Group and the trade book publisher Penguin Random House. Company: BMG Rights...
of block level verification tasks Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate...
—including place and route, timing closure, and power closure. Coordinate closely with RTL/design, DFT/test, packaging...
, including Xilinx Vivado Strong knowledge of System Verilog Experience with RTL design for various signal processing blocks...
Develop RTL using Verilog and/or VHDL Perform FPGA verification, including simulation, synthesis, timing analysis... RTL design, verification, logic synthesis, place and route, timing closure, and hardware validation Hands...
, or transitioning algorithms to RTL. Experience with dedicated DSP cores or accelerators. Track record of optimizing for power/area...
organization of architects, RTL designers, and verification engineers;establish clear technical expectations and a culture... preferred). Strong hands-on depth in RTL micro-architecture and implementation (SystemVerilog/Verilog/VHDL), synthesis, STA...