;preferable in-depth experience in top-level floorplanning Flow and Methodology Development Collaborating with IC Design RTL... Proficiency in related EDA Tools Full physical design cycle experience: RTL to Tape-out Excellent verbal and written...
Lugar:
San Jose, CA | 28/04/2026 19:04:37 PM | Salario: S/. $120000 - 192000 per year | Empresa:
Broadcom with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
-quality support for verification processes. RTL Architecture Tool Deployment & Support: You will successfully deploy... and maintain tools for RTL Architecture, ensuring integration with FE verification flows and addressing any support requirements...
challenges affecting PCB layouts to ensure robustness. Develop synthesizable RTL code using Verilog or VHDL, create test benches.... Expertise in HDL programming (Verilog and/or VHDL) for synthesizable RTL and verification. Experience with FPGAs and SoCs...
challenges affecting PCB layouts to ensure robustness. Develop synthesizable RTL code using Verilog or VHDL, create test benches.... Expertise in HDL programming (Verilog and/or VHDL) for synthesizable RTL and verification. Experience with FPGAs with AMD Zynq...
-Functional Debug: Partner closely with RTL design, architecture, and software teams to root-cause and rapidly resolve functional...
Lugar:
Sunnyvale, CA | 26/04/2026 17:04:24 PM | Salario: S/. $98040 - 154800 per year | Empresa:
Astreya. Successful candidates must have experience with RTL development using VHDL, as well as FPGA verification methodologies using System Verilog...
. Successful candidates must have experience with RTL development using VHDL, as well as FPGA verification methodologies using System Verilog...
, RTL coding, simulation and verification, chip testing, and supporting Automatic Test Equipment (ATE) issues Develop DFT...
Lugar:
Carlsbad, CA | 26/04/2026 00:04:45 AM | Salario: S/. $155000 - 193000 per year | Empresa:
MaxLinear. Successful candidates must have experience with RTL development using VHDL, as well as FPGA verification methodologies using System Verilog...