Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Minneapolis, MN | 31/05/2026 06:05:35 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: San Diego, CA | 31/05/2026 06:05:28 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Pittsburgh, PA | 31/05/2026 06:05:25 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Phoenix, AZ | 31/05/2026 06:05:16 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Philadelphia, PA | 31/05/2026 06:05:16 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Houston, TX | 31/05/2026 06:05:06 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Charlotte, NC | 31/05/2026 06:05:03 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Denver, CO | 31/05/2026 06:05:57 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Los Angeles, CA | 31/05/2026 06:05:51 AM | Salario: S/. $175 per hour | Empresa: SaidGig

Remote RTL Design Engineer for AI Evaluation Program

, memory subsystem, PCIe / high-speed IO, SoC interconnect, low-power design Exposure to formal verification or SV/UVM-based...-design workflows. We are looking for senior digital chip design and verification engineers who can dedicate significant time...

Lugar: Atlanta, GA | 31/05/2026 06:05:47 AM | Salario: S/. $175 per hour | Empresa: SaidGig
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