Physical Design Engineer (PD/PnR)

a Physical Design Engineer with strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion...-on expertise with Synopsys Fusion Compiler. Solid understanding of STA, timing closure, and MMMC methodologies. Experience...

Lugar: Mountain View, CA | 16/06/2026 21:06:05 PM | Salario: S/. $45000 - 121000 per year | Empresa: Wipro

ASIC Digital Design Architect

span-data-teams="true"-id="isPasted"-style="font-size:-10pt;-font-family:-arial;-color:-rgb(0,-0,-0);" At-Synopsys...,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys-considers...

Lugar: Austin, TX | 16/06/2026 20:06:45 PM | Salario: S/. No Especificado | Empresa: Synopsys

Principal Analog Methodology Specialist

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Williston, VT | 16/06/2026 20:06:25 PM | Salario: S/. No Especificado | Empresa: Synopsys

Senior Staff Analog Design Engineer

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Hillsboro, OR | 16/06/2026 19:06:53 PM | Salario: S/. No Especificado | Empresa: Synopsys

ASIC Digital Verification, Principal Engineer

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Austin, TX | 16/06/2026 17:06:52 PM | Salario: S/. No Especificado | Empresa: Synopsys

Lead ASIC DFT Engineer

, JTAG, boundary scan, and silicon debug. Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. Proven...

Lugar: Estados Unidos | 16/06/2026 17:06:47 PM | Salario: S/. No Especificado | Empresa: AIT Global

Lead ASIC DFT Engineer

, JTAG, boundary scan, and silicon debug. Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. Proven...

Lugar: Estados Unidos | 16/06/2026 17:06:09 PM | Salario: S/. No Especificado | Empresa: VDart