Graphics RTL Design Engineer

. Experience with Verilog/SystemVerilog design, Synopsys synthesis, low power design, test plan development, coverage-based design...

Lugar: Boxborough, MA | 01/03/2026 19:03:03 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Director, HBM SoC Design

. Proficiency with various EDA tools from Cadence, Synopsys, Siemens, etc. Experience with programming languages and scripting (e.g...

Lugar: Richardson, TX | 01/03/2026 02:03:59 AM | Salario: S/. No Especificado | Empresa: Micron

Senior GPU Memory Architect

architectures. Good understanding of power analysis tools like Ansys Power Artist, Synopsys PTPX, etc. Experience with C, C...

Lugar: Santa Clara, CA | 01/03/2026 02:03:26 AM | Salario: S/. No Especificado | Empresa: Nvidia

DFT (Design For Test) Engineer

with industry-standard EDA tools (e.g., Synopsys DFT Compiler, Cadence Encounter Test, Mentor Tessent). Scripting and automation...

Lugar: San Jose, CA | 28/02/2026 20:02:44 PM | Salario: S/. $15000 - 27000 per year | Empresa: Etched