SoC Timing (Static Timing Analysis/STA) Engineer, HBM

across all checks, modes, corners, and voltage and temperature conditions. Develop, maintain, and validate sign-off quality Synopsys... on multiple tape-outs at 5nm or below. Deep expertise with industry-standard static timing analysis tools such as Synopsys...

Lugar: Richardson, TX | 15/05/2026 20:05:04 PM | Salario: S/. No Especificado | Empresa: Micron

HBM SoC RTL Design Engineer

considerations. Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens. Programming or scripting experience (e.g...

Lugar: Folsom, CA | 15/05/2026 19:05:21 PM | Salario: S/. No Especificado | Empresa: Micron

SOC Timing Analysis (STA) Engineer ,HBM

, and voltage and temperature conditions. Develop, maintain, and validate comprehensive Synopsys Design Constraints (SDC... such as Synopsys PrimeTime and/or Cadence Tempus, including configuration of analysis modes, corner libraries, and sign-off decks...

Lugar: Richardson, TX | 15/05/2026 18:05:12 PM | Salario: S/. No Especificado | Empresa: Micron

EDA- CAD Engineer

, configure, and integrate industry-standard EDA tools (Cadence, Synopsys, Siemens/Mentor Graphics) into our infrastructure...

Lugar: San Jose, CA | 15/05/2026 17:05:32 PM | Salario: S/. $145800 - 194400 per year | Empresa: Western Digital

Senior Quantum Analog Mixed-Signal Verification Engineer

verification. Proficient use of Electronic Design Automation (EDA) tools from Cadence, Mentor, and Synopsys, including AMS tools... such as Synopsys XA and Cadence Spectre AMS. Proficient in digital verification setup using Universal Verification Methodology (UVM...

Lugar: Redmond, WA | 15/05/2026 00:05:05 AM | Salario: S/. No Especificado | Empresa: Microsoft

EDA- CAD Engineer

, configure, and integrate industry-standard EDA tools (Cadence, Synopsys, Siemens/Mentor Graphics) into our infrastructure...

Lugar: San Jose, CA | 14/05/2026 22:05:23 PM | Salario: S/. $145800 - 194400 per year | Empresa: Western Digital