Design Technology Co-Optimization (DTCO) Engineer, Design flow and Methodology
Innovus and/or Synopsys Fusion Compiler and reference flows. Experience with PPA analysis across standard cell library...
Innovus and/or Synopsys Fusion Compiler and reference flows. Experience with PPA analysis across standard cell library...
(e.g., Keysight ADS, Synopsys HSPICE, Cadence) and link modeling methodologies Analytical, problem-solving, and debugging...
, Mentor Graphics, or Synopsys Preferred Qualifications: Experience with advanced node semiconductor design Familiarity...
, PCIe, USB, MIPI, IEEE 802.11, and JEDEC semiconductor standards. Proficiency in Cadence, Synopsys, Mentor Graphics...
implementation using Cadence/Synopsys tools, making informed decisions on macro placement & tool options to optimize PPA. Build... familiarity with Cadence and/or Synopsys synthesis and physical implementation toolchains, including all associated quality...
, etc.) Experience with ASIC tool flows (e.g., Synopsys, Cadence, or similar) Familiarity with verification methodologies (UVM...
(SerDes, UCIe, etc..) Experience in Synopsys tools (Fusion Compiler, Primetime, VCS) Experience in EDA/CAD software...
background using SystemVerilog/Verilog. Hands-on experience with Synopsys HAPS, Protium, Palladium, or other FPGA/emulation...
nodes (5nm or lower) Strong user of synthesis tools such as Cadence Genus or Synopsys Fusion Compiler Proven track record...
Sigrity, Keysight ADS, or similar) Experience with SPICE simulation tools (e.g. Ansys Nexxim, Synopsys HSPICE, Cadence...