Physical Design Engineer
process nodes (5nm and below) Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL...
Lugar: Austin, TX | 16/04/2026 22:04:47 PM | Salario: S/. $15000 - 27000 per year | Empresa: Etched
Principal SoC DFT Engineer, HBM
. Proficiency with industry-standard EDA tools from Siemens, Synopsys, and/or Cadence for DFT and implementation. Familiarity...
Lugar: Richardson, TX | 16/04/2026 19:04:15 PM | Salario: S/. No Especificado | Empresa: Micron
Design Technology Co-Optimization (DTCO) Engineer, Design flow and Methodology
Innovus and/or Synopsys Fusion Compiler and reference flows. Experience with PPA analysis across standard cell library...
Lugar: Austin, TX | 16/04/2026 17:04:38 PM | Salario: S/. No Especificado | Empresa: Samsung
ASIC Link Modeling Technical Leader
(e.g., Keysight ADS, Synopsys HSPICE, Cadence) and link modeling methodologies Analytical, problem-solving, and debugging...
Lugar: Carlsbad, CA | 15/04/2026 17:04:56 PM | Salario: S/. No Especificado | Empresa: Cisco Systems
Hardware Design Engineer 3
, Mentor Graphics, or Synopsys Preferred Qualifications: Experience with advanced node semiconductor design Familiarity...
Lugar: Fort Meade, MD | 15/04/2026 17:04:21 PM | Salario: S/. $155000 - 185000 per year | Empresa: InterImage
Senior Consultant - Semiconductor
, PCIe, USB, MIPI, IEEE 802.11, and JEDEC semiconductor standards. Proficiency in Cadence, Synopsys, Mentor Graphics...
Lugar: Austin, TX | 15/04/2026 00:04:05 AM | Salario: S/. $115000 - 155000 per year | Empresa: Lumenci
RTL / Physical Design Engineer
implementation using Cadence/Synopsys tools, making informed decisions on macro placement & tool options to optimize PPA. Build... familiarity with Cadence and/or Synopsys synthesis and physical implementation toolchains, including all associated quality...
Lugar: San Jose, CA | 14/04/2026 17:04:30 PM | Salario: S/. No Especificado | Empresa: Persimmons
ASIC Engineer
, etc.) Experience with ASIC tool flows (e.g., Synopsys, Cadence, or similar) Familiarity with verification methodologies (UVM...
Lugar: Atlanta, GA | 14/04/2026 17:04:51 PM | Salario: S/. No Especificado | Empresa: Falcomm
Physical Design Engineer - Neuromorphic Computing
(SerDes, UCIe, etc..) Experience in Synopsys tools (Fusion Compiler, Primetime, VCS) Experience in EDA/CAD software...
Lugar: Hillsboro, OR | 13/04/2026 21:04:14 PM | Salario: S/. No Especificado | Empresa: Intel
CPU Synthesis CAD Engineer
nodes (5nm or lower) Strong user of synthesis tools such as Cadence Genus or Synopsys Fusion Compiler Proven track record...
Lugar: Santa Clara, CA | 12/04/2026 00:04:25 AM | Salario: S/. No Especificado | Empresa: Qualcomm