Principal Engineer
\. Cadence layout tools, including Innovus or Tempus or Synopsys, including ICC2 or PrimeTime;7\. PDN design and evaluation...
Lugar: Richardson, TX | 31/03/2026 18:03:37 PM | Salario: S/. No Especificado | Empresa: Micron
FPGA Verification Engineer (Level 3 or 4)
, Verilog, VHDL). Familiarity with industry-standard tools (e.g., Synopsys, Mentor Graphics). 3+ years of experience...
Lugar: Linthicum, MD | 30/03/2026 17:03:52 PM | Salario: S/. $119600 - 179400 per year | Empresa: Northrop Grumman
Emulation Engineer
. Job Description: Skills: Verilog, VHDL, System Verilog, Xilinx FPGA, HAPS, Vivado, C/C++Synopsys ZeBu, Cadence Palladium/Protium... with Synopsys HAPS prototyping platforms. Solid understanding of SoC bring-up, debug methodologies, and waveform analysis...
Lugar: Austin, TX | 29/03/2026 03:03:18 AM | Salario: S/. No Especificado | Empresa: Varite
Senior Photonics Integrated Circuit Design Engineer
design and simulation tools (e.g., Ansys Lumerical, Synopsys Optocompiler, KLayout, etc.). Experience in developing...
Lugar: San Diego, CA | 29/03/2026 03:03:08 AM | Salario: S/. $95500 - 181700 per year | Empresa: Raytheon Technologies
Principal Photonics Integrated Circuit Design Engineer
design and simulation tools (e.g., Ansys Lumerical, Synopsys Optocompiler, KLayout, etc.). Experience in developing...
Lugar: San Diego, CA | 29/03/2026 01:03:00 AM | Salario: S/. No Especificado | Empresa: Raytheon Technologies
ASIC Design Hardware Engineer - SDC/STA (Hybrid)
or related experience. Experience with synthesis tools (e.g.. Synopsys DC/DCG/FC), STA tools such as Primetime...
Lugar: San Jose, CA | 28/03/2026 18:03:43 PM | Salario: S/. No Especificado | Empresa: Cisco Systems
Semiconductor Design Engineer [Teradyne, N. Reading, MA]
. Operating Systems: Windows, Linux Development Tools: Cadence(Xcellium), Synopsys(Spyglass CDC/LINT), Xilinx(Vivado), Intel...
Lugar: North Reading, MA | 27/03/2026 20:03:37 PM | Salario: S/. $140500 per year | Empresa: Teradyne
FPGA Verification Engineer (Level 5)
-standard tools (e.g. Synopsys, Mentor Graphics). Knowledge and hands-on experience with VUnit. Digital subsystem, ASIC...
Lugar: Linthicum, MD | 27/03/2026 18:03:10 PM | Salario: S/. No Especificado | Empresa: Northrop Grumman
Fall 2026 Co-Op - Digital Design Engineer
Processing (DSP) concepts. Proficiency in Verilog and Synopsys-based design flows. Experience with Matlab for algorithm...
Lugar: Austin, TX | 27/03/2026 02:03:37 AM | Salario: S/. No Especificado | Empresa: Cirrus Logic
Staff EDA Licensing & Infrastructure Engineer
with major EDA tool suites (Synopsys, Cadence, Siemens, and others), including tool installation and basic environment setup...
Lugar: Santa Clara, CA | 27/03/2026 00:03:56 AM | Salario: S/. $108220 - 162100 per year | Empresa: Marvell