Hardware Manager, Post-Silicon Electrical Validation

. Independently isolate and root-cause silicon, package, board, or signal integrity issues Lead validation of Ethernet MAC/PHY..., jitter, compliance testing) Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe Gen3, USB2.0, eMMC, SPI, MDIO...

Lugar: San Jose, CA | 31/03/2026 17:03:15 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

HW Post-Silicon Validation Engineer

Help isolate silicon, board, or signal integrity issues under guidance Validate Ethernet MAC/PHY and high-speed... with: DDR5, USB3.0, SGMII, PCIe Gen3.x, USB2.0, eMMC, SPI, MDIO, I2C, UART. Exposure to Ethernet, PCIe, or SerDes testing...

Lugar: San Jose, CA | 27/01/2026 18:01:26 PM | Salario: S/. No Especificado | Empresa: Cisco Systems
1