Asic Design Verification Intern (Córdoba)

Design Verification Intern, you will learn about the verification of VLSI architectures designed in-house. Every day...-oriented programming (OOP) - Basic concepts about verification tools such as Verilog and System Verilog for digital system...

Lugar: Argentina | 14/06/2026 17:06:45 PM | Salario: S/. No Especificado | Empresa: Marvell

Digital Design Verification Intern

Intern, you will learn about the verification of VLSI architectures designed in-house. Every day you will: Develop the... Verilog, for digital system description and verification Some experience with Python scripting for the creation of models...

Lugar: Córdoba | 21/05/2026 23:05:58 PM | Salario: S/. No Especificado | Empresa: Marvell
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