Architecte ASIC/FPGA Numérique - F/H
, SystemVerilog) ainsi que les outils de développement associés (Vivado, Quartus, Synopsys, ModelSim…). Connaissance approfondie...
Sr Staff Engineer, Operational Security DevOps (f/m)
At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys... Security DevOps (f/m) France Off-site Engineering Employee Save Job Share Jump to Overview Synopsys software...
R&D Engineering, Sr Engineer - Biomechanical Software (f/m)
At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys... Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining...
Staff Engineer – AI, Geometry & Meshing
At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys... Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining...
Lugar: Montigny-le-Bretonneux, Yvelines | 05/09/2026 21:09:19 PM | Salario: S/. No Especificado | Empresa: Synopsys
FY27 Intern - HW/FW Architecture for Post-Quantum Cryptography - 6 months, Sophia
to work with minimum supervision, Proficiency in one or more developer skills: Verilog, System Verilog, Cadence, Synopsys...
Lugar: Alpes-de-Haute-Provence - Bainbridge, North Yorkshire | 06/11/2026 22:11:45 PM | Salario: S/. No Especificado | Empresa: Qualcomm
Developer Relations Manager, Computer Aided Engineering
, preferably with a CAE ISV such as Altair, Ansys, Cadence, Dassault, Hexagon, Siemens, Synopsys, etc. A track record of defining...
Internship RISC-V matrix/vector ISA extension Benchmark-Grenoble-H/F
Methods / Means gcc compilation and linker, RTL/systemC simulation, synopsys design exploration if time allows Applicant...
Lugar: Grenoble, Isère | 30/10/2026 20:10:58 PM | Salario: S/. No Especificado | Empresa: Commissariat à l'Énergie Atomique
Library Characterization Engineer
tools such as Cadence Liberate, Synopsys SiliconSmart/PrimeLib. SPICE Simulation: Run and debug HSPICE / FineSim / Spectre...
Lugar: Provence-Alpes-Côte d'Azur | 27/10/2026 21:10:00 PM | Salario: S/. No Especificado | Empresa: Microchip Technology
Senior Hardware Design Engineer
in Verilog/SystemVerilog and simulation tools such as: Cadence Synopsys Mentor Experience with SystemC, C++, Python...
Lugar: France | 10/10/2026 00:10:32 AM | Salario: S/. No Especificado | Empresa: European Recruitment
Senior SOC Design For Test Engineer
/ Boundary Scan Experience with industry-standard DFT tools such as Synopsys TestMAX, Cadence Modus, or Siemens Tessent. Good...
Lugar: Grenoble, Isère | 06/10/2026 22:10:21 PM | Salario: S/. No Especificado | Empresa: NXP Semiconductors