Lead end‑to‑end deployment of strategic regional systems (e.g., SAP TM, Transporeon) - from pre‑engagement planning... cadence of EMEA business reviews;leverage data‑driven insights to steer performance;identify gaps and deploy the Excellence...
into end‑to‑end design flows combining C++ core engines with Cadence Virtuoso, SKILL/PCells, and Python automation. The... methodology will be validated by building automatic physical‑design generators for analog cryogenic multiplexer arrays. Ideal...
. Execute both block and system levels verification. Simulate and debug using Cadence/Synopsys tools for design inspection... preferably in memory design System Verilog and UVM methodology experience. Cadence verification tool chain experience (Virtuoso...
with industry‑standard design, simulation, and physical implementation tools (e.g., Cadence DFII, Virtuoso, Spice simulators..., Verilog‑A, Cadence Pegasus). Solid understanding of CMOS technology, digital design principles, and the interaction...
into robust silicon. Must Have CMOS IC design (Analog/Mixed Signal), NVM Device Design, Design tools: Cadence, Verilog... design (analog/mixed signal) and NVM device design. Hands‑on experience with Cadencedesign environment and Verilog...
(passive component design using industry-standard tools such as Cadence Virtuoso and HFSS, EMX). It would be nice... Frequency Integrated Circuit (RFIC) Design Engineer, where you will play a crucial role in designing high-speed drivers, trans...
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Deutschland | 23/04/2026 21:04:09 PM | Salario: S/. No Especificado | Empresa:
Nokia digital leader who thrives on building systems, scaling teams, and delivering measurable business outcomes through strategy... quality standards and lifecycle governance. Ensure seamless integrations across marketing systems (web forms, lead capture...
Cadence (Virtuoso, PVS) and Siemens (Calibre) tool chains;deep knowledge of analog circuit design, including low-power... systems (MEMS) and dedicated to the consumer electronics world. We develop and market key technologies for smartphones...
: Experience with digital backend flows using Synopsys or Cadence tools Familiarity with low‑power digital design techniques... telecommunications industry. Aufgaben At Ciena, digital design engineers play a pivotal role, In this role, you will propose...
within the Cadence environment. Interface Development: Design auxiliary circuits to interface analog ICs with I2C/SPI digital... on I/O interfaces. Technical Mastery: Expert-level proficiency in the CadenceDesign Framework and a deep understanding of DFM (Design...