CLM Lead

cadence, churn prevention, win-back, loyalty. The CRM system: segmentation, flow architecture, A/B testing, multi-channel...;smart segmentation;AI-assisted design, copy, and translation. You treat AI as craft, not slideware. The team: two Senior...

Lugar: Berlin | 04/05/2026 02:05:54 AM | Salario: S/. No Especificado | Empresa: Every.

Head of In- & Outbound Logistics Excellence EMEA (m/f/d)

Lead end-to-end deployment of strategic regional systems (e.g., SAP TM, Transporeon) - from pre-engagement planning... cadence of EMEA business reviews;leverage data-driven insights to steer performance;identify gaps and deploy the Excellence...

Lugar: Iphofen, Bayern | 01/05/2026 01:05:04 AM | Salario: S/. No Especificado | Empresa: Knauf

Head of In- & Outbound Logistics Excellence EMEA (m/f/d)

Lead end‑to‑end deployment of strategic regional systems (e.g., SAP TM, Transporeon) - from pre‑engagement planning... cadence of EMEA business reviews;leverage data‑driven insights to steer performance;identify gaps and deploy the Excellence...

Lugar: Iphofen, Bayern | 30/04/2026 18:04:19 PM | Salario: S/. No Especificado | Empresa: Knauf

Global Supply Chain Excellence Analyst

. This role partners with regional and functional teams worldwide to design, optimize, and harmonize planning processes, develop... Planning Systems (APS) to deliver the expected process improvements. This position will spearhead a wide range of supply chain...

Lugar: Deutschland | 29/04/2026 20:04:57 PM | Salario: S/. No Especificado | Empresa: Archer-Daniels-Midland

Digital Design Verification Engineer

. Execute both block and system levels verification. Simulate and debug using Cadence/Synopsys tools for design inspection... preferably in memory design System Verilog and UVM methodology experience. Cadence verification tool chain experience (Virtuoso...

Lugar: Dresden, Sachsen | 28/04/2026 17:04:43 PM | Salario: S/. No Especificado | Empresa: Ferroelectric Memory

Senior Digital IC Design Engineer

with industry‑standard design, simulation, and physical implementation tools (e.g., Cadence DFII, Virtuoso, Spice simulators..., Verilog‑A, Cadence Pegasus). Solid understanding of CMOS technology, digital design principles, and the interaction...

Lugar: Dresden, Sachsen | 25/04/2026 17:04:24 PM | Salario: S/. No Especificado | Empresa: Ferroelectric Memory

Radio Frequency Integrated Circuit (RFIC) Design Engineer

(passive component design using industry-standard tools such as Cadence Virtuoso and HFSS, EMX). It would be nice... Frequency Integrated Circuit (RFIC) Design Engineer, where you will play a crucial role in designing high-speed drivers, trans...

Lugar: Deutschland | 23/04/2026 20:04:20 PM | Salario: S/. No Especificado | Empresa: Nokia