FPGA Design Engineer (m/f/d)

(e.g., carrier‑based, space‑vector, multi‑phase, interleaved, dead‑time insertion, synchronised to grid or rotating frame...

Lugar: Berlin | 04/04/2026 01:04:52 AM | Salario: S/. No Especificado | Empresa: GE Vernova

Tax Underwriter

offering. With a strong international platform, deep carrier relationships, and an ambitious growth strategy, the business...

Lugar: München, Bayern | 01/04/2026 22:04:52 PM | Salario: S/. No Especificado | Empresa: IDEX Consulting