Define and own the IO and PHY concepts for high-speed memory interfaces Perform block-level simulation, analysis, and feasibility checks Review and guide schematic-level implementation to align with architectural intent Support verification...
Design digital and mixed signal blocks for GDDR and DDR DRAM at transistor, gate and RTL levels. Define interface, behavior, and functional requirements for mixed signal blocks. Collaborate with block owners and integration teams to ensure ...
Design digital and mixed signal blocks for GDDR and DDR DRAM at transistor, gate and RTL levels. Define interface, behavior, and functional requirements for mixed signal blocks. Collaborate with block owners and integration teams to ensure ...
Design digital blocks such as control logic, BIST, DfT, using semi-custom methodologies. Define interface, behavior, and functional requirements for digital blocks. Collaborate with block owners and integration teams to ensure full-chip int...
Translate product requirements into architecture specifications with consideration for power, performance, area, cost, and full-chip integration. Design complex digital blocks using semi-custom methodologies. Define digital block requiremen...
in architecting and developing cutting-edge sub-micron devices. This role demands exceptional technical expertise...
with asynchronous clocks and clock-domain crossing Knowledge of deep sub-micron technologies Knowledge of digital circuit design...
with asynchronous clocks and clock-domain crossing Knowledge of deep sub-micron technologies Knowledge of digital circuit design...
simulations that leverage sub-micron CMM data to understand complex phenomena like tool deflection and thermal drift. We value...
in architecting and developing cutting-edge sub-micron devices. This role demands exceptional technical expertise...