Design and RTL coding of digital and full-custom modules Verification on module and chip level including test plan/cases... in digital design (SOC), ASIC design methodologies and silicon development cycle Experience in Register Transfer Level (RTL...
, processor architecture and microarchitecture, and some familiarity with RTL and hardware design. Experience with agentic...
. Strong skills in RTL coding (Verilog, VHDL), C/C++ programming, Python scripting, timing constraints and verification...
. Tasks Build cocotb-based testbenches for RTL blocks ranging from complicated datapaths to multilevel interconnect, driven... violations directly in simulation, plus cover property statements to close functional-coverage gaps. Cross-check RTL behavior...
Build cocotb-based testbenches for RTL blocks ranging from complicated datapaths to multilevel interconnect, driven... violations directly in simulation, plus cover property statements to close functional-coverage gaps. Cross-check RTL behavior...
Architecture development for CMOS IP designs Design and RTL coding of digital and full-custom modules Verification on module... in Register Transfer Level (RTL) coding (Verilog) Experience with standard simulation tools for digital designs Basic knowledge...
and integrate digital blocks. Develop high-quality, area-optimal, low-power RTL design using industry-standard hardware...
and hardware specifications through RTL design, optimising for silicon area, performance, and power. Design and implement digital..., and testing DSP algorithms in RTL code. Hands-on experience with Xilinx FPGA platforms (RFSoC, Versal Gen1/Gen2). Expertise...
families and IP for timing‑critical and safety‑related functions. Develop synthesizable RTL (VHDL) for: PWM generators... and a solid understanding of synthesizable RTL design, timing constraints, and clock domain crossing techniques. Hands...
RTL and gate-level simulation, linting, logic synthesis, STA, UPF (low-power design), and DfT Proficiency in HDLs...