SOC Physical Design Verification Intern (m/f/d)
Background on device physics fundamentals Overall ASIC (RTL-to-GDS) design cycle understanding especially PNR/back-end analysis...
Background on device physics fundamentals Overall ASIC (RTL-to-GDS) design cycle understanding especially PNR/back-end analysis...
architecture Experience and/or are interested in silicon and RTL test and debug Key Qualifications Key Qualifications...-silicon verification environments (RTL simulation, emulation and FPGA prototyping) is a plus English language fluency...
as well as design- and timing analysis. Together with RTL designers, Physical designers, and other integration teams..., and revision control systems (e.g. PerForce) Very good experience with Verilog and the ability to analyze RTL/Netlist designs...
and mixed-signal verification and circuit modeling Understanding of analog schematics and digital RTL to support and analyse...