Manager, Program Management
& Execution Own end-to-end NTI program execution including scope definition, baseline planning, and phase-gate readiness...
& Execution Own end-to-end NTI program execution including scope definition, baseline planning, and phase-gate readiness...
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. Responsibilities: Develop and qualify plasma etch processes for critical layers-gate, spacer, contact, and metal interconnect-at 2nm...
, CVD, and PECVD processes for gate dielectrics, high-k materials, inter-layer dielectrics (ILD), and spacer films at 2nm..., and stress Own development for high-k gate dielectrics (HfOâ‚‚, HfZrO) and low-k ILD films from tool installation through HVM...
in the world. Responsibilities: Develop and qualify ALD, CVD, and PVD processes for metal gate, work function metals...
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