Senior Staff Engineer Elect Design(Location:Tokyo)

) Hierarchical Layout Design using Fusion Compiler 2) Physical Verification in Chip level and/or Hierarchical design block... in Fusion Compiler and PV error fixing (prefer to have LEC, Lint and Python script skill),English and fluent (prefer...

Lugar: Tokyo | 14/03/2026 02:03:34 AM | Salario: S/. No Especificado | Empresa: Infineon
1