· Responsible for Design and development of IP layouts used in DRAM chips. · Perform layout verification like LVS/DRC/EM, quality...
Chips) prestaciones de ley HORARIOS: 10 a 7 L a V, 10 a 5 S. Domingo descanso fijo Si estás buscando un desafÃo...
, Xilinx and Intel FPGA chips. Proficient in Verilog language. Proficient in using Diamond Vivado and Quartus development...
SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows. Work...
Lugar:
Tijuana, B.C. | 07/11/2024 00:11:36 AM | Salario: S/. No Especificado | Empresa:
NAPS