Layout Design Engineer
in: Device-level CMOS analog/memory custom layout design Advanced process nodes (7nm and beyond) ICC, Fusion compilers.... Job Type: Experienced Hire Shift: Shift 1 (Mexico) Primary Location: Mexico, Guadalajara Additional Locations: Business group: Intel...
Lugar: Guadalajara, Jal. | 19/02/2026 01:02:05 AM | Salario: S/. No Especificado | Empresa: Intel