Layout Engineer
We are looking for Analog Layout Engineers! Requirements: RTL Design experience STA timing constrains experience...
Lugar: Guadalajara, Jal. | 23/10/2024 17:10:32 PM | Salario: S/. 30000 - 40000 mensual | Empresa: Manpower
DRAM Design Engineer
: Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.... Experience in RTL development for logic or mixed-signal circuits....
Lugar: Guadalajara, Jal. | 22/10/2024 17:10:53 PM | Salario: S/. 50000 per year | Empresa: Manpower
Senior Circuit Design Engineer
You Apart: Familiarity with memory design and digital design. RTL design/verification experience and knowledge of STA...
Lugar: Tlaquepaque, Jal. | 11/10/2024 17:10:45 PM | Salario: S/. No Especificado | Empresa: Manpower
Senior Design Verification Engineer - DFT
: Understanding of ASIC design flow, including RTL design, verification, and timing analysis. Familiarity with DRAM DFT verification...
Lugar: Tlaquepaque, Jal. | 11/10/2024 17:10:27 PM | Salario: S/. No Especificado | Empresa: Manpower
DRAM Design Engineer
: Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.... Experience in RTL development for logic or mixed-signal circuits....
Lugar: Guadalajara, Jal. | 26/09/2024 17:09:18 PM | Salario: S/. 50000 per year | Empresa: Manpower
Pre Silicon Test Engineer
activities to identify and resolve design issues. Collaborate with RTL designers to improve design quality and ensure... RTL verification using VHDL, Verilog, or SystemVerilog. Over 1 year of experience in pre-silicon verification, functional...
Lugar: Tijuana, B.C. | 21/09/2024 21:09:29 PM | Salario: S/. No Especificado | Empresa: NAPS