Soc/Ip Design Verification Engineer

coverage): define, measure, analyze holes, and implement closure strategies. Leverage assertions (SVA) and formal..., PCIe, LP/DDR, USB, MIPI, I3C, SPI/I2C, Ethernet;integrating and customizing VIP. Assertion-based verification (SVA...

Lugar: Veracruz, Ver. | 11/04/2026 17:04:00 PM | Salario: S/. No Especificado | Empresa: Intel
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