Senior Digital ASIC Design Engineer

direction of cutting-edge IP for complex digital-AMS ASIC solutions. You will be part of a global team tasked with the design... verilog, creating test benches, assertions, formal methods low-power constraints, UPF Excellent salaries, benefits, stocks...

Lugar: Rijswijk, Zuid-Holland | 05/06/2026 17:06:20 PM | Salario: S/. No Especificado | Empresa: IC Resources

Senior Verification Engineer

and debugging simulation results Reviewing verification results for Tape-out sign-off Communicating with stakeholders (design/test... SystemVerilog RNM, Wreal (V-AMS), or similar techniques Experience with UVM-AMS methodology Solid experience with Formal Property...

Lugar: Países Bajos | 17/03/2026 22:03:22 PM | Salario: S/. No Especificado | Empresa: European Recruitment
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