ASIC Engineer

generation Experience with CAD tools for circuit design and simulation (e.g., Cadence, Synopsys). Ability to work...The Memory Circuit Design Engineer is responsible for designing, developing, and testing memory circuits used...

Lugar: Jhubei, Hsinchu County | 19/06/2026 17:06:24 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Sr. Systems Design Engineer

found during the process, bring-up, validation, and production phases. Familiar with board Design tool (Cadence's Concept... that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded...

Lugar: Taipei City | 18/06/2026 23:06:47 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Systems Design Engineer

found during the process, bring-up, validation, and production phases. Familiar with board Design tool (Cadence's Concept... that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded...

Lugar: Taipei City | 18/06/2026 18:06:33 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Principal Product Engineer

. Develop or integrate digital design flow/tools with Cadence methodologies and technologies into Foundries’ advanced process...At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 1...

Lugar: Hsinchu City | 18/06/2026 01:06:40 AM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Learning Ecosystem Product Manager

management, governance, and enterprise learning systems, shaping how demand is managed, decisions are made, and how the ecosystem... systems, shaping how demand is managed, decisions are made, and how the ecosystem evolves in a controlled, value-driven way...

Lugar: Taoyuan City | 17/06/2026 02:06:30 AM | Salario: S/. No Especificado | Empresa: Micron

DevOps Engineer

with tolls like Cadence Palladium and zebu for simulation acceleration and hybrid verification environments. Security... and compliance (DevSecOps) Secure CI/CD pipelines: Emphasis on secure design,secure code and secure operations throughout the DevOps...

Lugar: Taipei City | 12/06/2026 22:06:47 PM | Salario: S/. No Especificado | Empresa: UST

Hardware Design Engineer, Optical Validation

Proficiency with Cadence OrCAD / Allegro PCB design tools Hands‑on lab experience with high‑speed measurements, including real... Engineer to support the design and development of evaluation platforms for optical validation across multiple DSP products used...

Lugar: Hsinchu City | 04/06/2026 02:06:37 AM | Salario: S/. No Especificado | Empresa: Marvell