Memory layout Engineer

in layout tools such as Cadence Virtuoso or Synopsys Custom Compiler. Solid understanding of CMOS device physics and memory...

Lugar: Hsinchu City | 02/03/2026 03:03:43 AM | Salario: S/. No Especificado | Empresa: Qualcomm

全球儲存方案領導者 - Physical Designer

【Client Description】 專注高速介面與儲存技術研發,產品廣泛應用於消費性與企業級裝置,具全球客戶與量產實力。 【Candidate Profile】 熟悉 Synopsys 或 Cadence 後端...

Lugar: Hsinchu County | 28/02/2026 21:02:00 PM | Salario: S/. No Especificado | Empresa: Adecco

Packaging Engineer

such as Cadence SIP, APD, Synopsys 3DICC, First Encounter, ICC2 or other Packaging or Silicon Physical Layout Software. Knowledge...

Lugar: Hsinchu City | 08/02/2026 03:02:03 AM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices