Memory layout Engineer

in layout tools such as Cadence Virtuoso or Synopsys Custom Compiler. Solid understanding of CMOS device physics and memory...

Lugar: Hsinchu City | 01/03/2026 19:03:56 PM | Salario: S/. No Especificado | Empresa: Qualcomm

Packaging Engineer

such as Cadence SIP, APD, Synopsys 3DICC, First Encounter, ICC2 or other Packaging or Silicon Physical Layout Software. Knowledge...

Lugar: Hsinchu City | 07/02/2026 18:02:10 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices